The present invention relates to a display apparatus, and particularly to an active matrix display apparatus of a dot-sequential driving type using a so-called clock driving method in a horizontal driving circuit thereof.
In a display apparatus, for example an active matrix liquid crystal display apparatus using a liquid crystal cell as a display element (electro-optical element) of a pixel, a horizontal driving circuit of a dot-sequential driving type using a clock driving method, for example, is known. FIG. 13 shows a conventional example of the clock driving type horizontal driving circuit. In FIG. 13, the horizontal driving circuit 100 has a shift register 101, a clock extracting switch group 102, and a sampling switch group 103.
The shift register 101 is formed by “n” shift stages (transfer stages). When a horizontal start pulse HST is supplied to the shift register 101, the shift register 101 performs shift operation in synchronism with horizontal clocks HCK and HCKX opposite to each other in phase. Thus, as shown in a timing chart of FIG. 14, the shift stages of the shift register 101 sequentially output shift pulses Vs1 to Vsn having a pulse width equal to a cycle of the horizontal clocks HCK and HCKX. The shift pulses Vs1 to Vsn are supplied to switches 102-1 to 102-n of the clock extracting switch group 102.
The switches 102-1 to 102-n of the clock extracting switch group 102 are alternately connected at one terminal thereof to clock lines 104-1 and 104-2 that input the horizontal clocks HCKX and HCK. By being supplied with the shift pulses Vs1 to Vsn from the shift stages of the shift register 101, the switches 102-1 to 102-n of the clock extracting switch group 102 are sequentially turned on to alternately extract the horizontal clocks HCKX and HCK. The extracted pulses are supplied as sampling pulses Vh1 to Vhn to switches 103-1 to 103-n of the sampling switch group 103.
The switches 103-1 to 103-n of the sampling switch group 103 are each connected at one terminal thereof to a video line 105 for transmitting a video signal “video”. The switches 103-1 to 103-n of the sampling switch group 103 are sequentially turned on in response to the sampling pulses Vh1 to Vhn extracted and sequentially supplied by the switches 102-1 to 102-n of the clock extracting switch group 102, thereby sequentially sample the video signal “video”, and then supply the sampled video signal “video” to signal lines 106-1 to 106-n of a pixel array unit (not shown).
In the clock driving type horizontal driving circuit 100 according to the foregoing conventional example, a delay is caused in the sampling pulses Vh1 to Vhn by wiring resistance, parasitic capacitance and the like in a transmission process from the extraction of the horizontal clocks HCKX and HCK by the switches 102-1 to 102-n of the clock extracting switch group 102 to the supply of the horizontal clocks HCKX and HCK as the sampling pulses Vh1 to Vhn to the switches 103-1 to 103-n of the sampling switch group 103.
The delay in the sampling pulses Vh1 to Vhn in the transmission process causes waveforms of the sampling pulses Vh1 to Vhn to be rounded. As a result, directing attention to the sampling pulse Vh2 in the second stage, for example, as is particularly clear from a timing chart of FIG. 15, the waveform of the sampling pulse Vh2 in the second stage overlaps the waveforms of the preceding and succeeding sampling pulses Vh1 and Vh3 in the first stage and the third stage.
In general, as shown in FIG. 15, charge and discharge noise is superimposed on the video line 105 at an instant when each of the switches 103-1 to 103-n of the sampling switch group 103 is turned on, because of a relation in potential between the video line 105 and the signal lines 106-1 to 106-n. 
In such a situation, when the sampling pulse Vh2 overlaps the sampling pulses in the preceding and succeeding stages, as described above, charge and discharge noise caused by turning on the sampling switch 103-3 in the third stage is sampled in sampling timing of the second stage based on the sampling pulse Vh2. The sampling switches 103-1 to 103-n sample and hold the potential of the video line 105 in timing in which the sampling pulses Vh1 to Vhn reach an “L” level.
In this case, since the charge and discharge noise superimposed on the video line 105 is varied and also the timing in which each of the sampling pulses Vh1 to Vhn reaches the “L” level is varied, the potential sampled by the sampling switches 103-1 to 103-n is varied. As a result, the variation in the sampled potential appears as a vertical streak on the display screen, thus degrading picture quality.
When the number of pixels in a horizontal direction, in particular, is increased with higher definition in the active matrix liquid crystal display apparatus of the dot-sequential driving type, it is difficult to secure a sufficient sampling time for the sequential sampling for all the pixels of the video signal “video” inputted by one system within a limited horizontal effective period. Accordingly, in order to secure a sufficient sampling time, as shown in FIG. 16, a method is used in which video signals are inputted in parallel by “m” systems (m is an integer of 2 or more), and with “m” pixels in the horizontal direction as a unit, “m” sampling switches are provided and driven simultaneously by one sampling pulse, whereby sequential writing in a unit of “m” pixels is performed.
In the following, consideration will be given to a case where a fine black line having a width corresponding to the unit pixel number “m” or less is displayed. When such a black line is displayed, the video signal “video” is inputted as a waveform having a black level portion in the form of a pulse as shown in FIG. 17A, and having a pulse width equal to that of a sampling pulse (B). Although the video signal “video” in the form of the pulse is ideally a rectangular wave, a rising edge and a falling edge of the pulse waveform are rounded (video signal “video′”) due to wiring resistance, parasitic capacitance and the like of the video line transmitting the video signal “video”, as shown in FIG. 17C.
When the video signal “video′” in the form of the pulse having the rounded rising edge and falling edge is sampled and held by the sampling pulses Vh1 to Vhn, although the video signal “video′” in the form of the pulse is intended to be sampled and held by a sampling pulse Vhk in a kth stage, the rising edge portion of the video signal “video′” is sampled and held by a sampling pulse Vhk−1 in the preceding stage, or the falling edge portion of the video signal “video′” is sampled and held by a sampling pulse Vhk+1 in the succeeding stage. As a result, a ghost occurs. The ghost refers to an undesired interference image displaced from and overlapping the normal image.
A phase relation of the video signal “video′” (hereinafter referred to simply as the video signal “video”) with the sampling pulse Vhk can be changed to six phases of S/H=0 to 5, for example, as shown in FIG. 18 by adjusting a position, that is, a sample hold position of the video signal “video” on a time axis by a circuit for processing the video signal “video”.
Dependence of occurrence of a ghost on sample hold will be described in the following. First, consideration will be given to a case where S/H=1. FIG. 19 shows a phase relation between the video signal “video” when S/H=1 and the sampling pulses Vhk−1, Vhk, and Vhk+1, and change in signal line potential. When S/H=1, the video signal “video” in the form of the pulse is sampled and held by the sampling pulse Vhk, whereby the black signal is written to the signal line in the kth stage, and a black line is displayed.
However, at the same time, the black signal portion (pulse portion) of the video signal “video” overlaps the sampling pulse Vhk−1 in the (k−1)th stage, and therefore the black signal is also written to the signal line in the (k−1)th stage. Thus, as shown in FIG. 20, a ghost occurs at a position in the (k−1)th stage, that is, in a front direction of horizontal scanning. Similarly, when S/H=0, the black signal portion of the video signal “video” overlaps the sampling pulse Vhk−1 in the (k−1)th stage, and therefore a ghost occurs in the front direction of horizontal scanning.
Next, consideration will be given to a case where S/H=5. FIG. 21 shows a phase relation between the video signal “video” when S/H=5 and the sampling pulses Vhk−1, Vhk, and Vhk+1, and change in signal line potential. When S/H=5, the black video signal overlaps the sampling pulse Vhk+1 in the (k+1) th stage. The black signal is written to the signal line in the (k+1) th stage when the sampling switch is turned on, and thereafter the signal line potential attempts to return to gray level. However, because of a large amount of overlap, the signal line potential does not completely return to the gray level. Thus, as shown in FIG. 22, a ghost occurs in a position in the (k+1) th stage, that is, in a rear direction of horizontal scanning.
Similarly to the case where S/H=5, when S/H=1 to 4, the sampling pulse Vhk+1 in the (k+1) th stage and the black portion of the video signal overlap each other. The black signal is written to the signal line in the (k+1) th stage when the sampling switch is turned on. However, because of smaller amounts of overlap and hence lower black levels written than when S/H=5, the signal line potential can completely return to the gray level. Thus, no ghost occurs.
In the process as described above, a ghost results from overlap between the video signal “video” and a sampling pulse. The number of sample hold positions such as S/H=2, 3, and 4 in which no ghost occurs in the front or rear direction is referred to as a margin for ghosts (hereinafter referred to as a ghost margin).
Thus, it may not be possible to avoid the problem of waveform rounding occurring at the rising edge and the falling edge of the video signal “video” in the form of a pulse due to wiring resistance, parasitic capacitance and the like of the video line, but occurrence of a ghost can be avoided by setting an optimum sample hold position by a circuit part for processing the video signal “video”.
However, since waveform rounding occurs at the rising edge and the falling edge of the video signal “video” in the form of a pulse due to wiring resistance, parasitic capacitance and the like of the video line, the pulse waveform portion of the video signal “video” overlaps the sampling pulse in the preceding or succeeding stage. Therefore, the ghost margin is correspondingly limited. In the above example, the ghost margin is three, with S/H=2, 3, and 4.